Simulating DSP algorithms using Verilog.
When you think about DSP algorithms, sure you think of applications such as MATLAB, Octave or Python. In the same way, when you think about simulating HDL, to your head comes words like Verilog or VHDL, but, what happens when we mix these worlds? When we have to simulate a DSP algorithm, implemented into an FPGA, the fact that for the simulation we are going to need analog and floating point signals, could make us…